Scaling up BrainScaleS-2: connecting neuromorphic chips for larger networks

Image of the BrainScaleS-2 multi-chip system

The BrainScaleS-2 multi-chip system. Fully equipped, it will consist of two backplanes with 12 interconnected BrainScaleS-2 SoCs each, corresponding to a total of 12 thousand neurons and 3 million synapse circuits. IMAGE: J. Ilmberger and J. Schemmel, 2026.

A single BrainScaleS-2 chip can emulate hundreds of neurons and more than 130,000 synaptic connections.

But to study larger and more complex neural networks, researchers need to connect many such chips and make them work in unison.The BrainScaleS-2 multi-chip system provides a modular and flexible way to do this while achieving low latencies. The system has been presented by researchers from the EBRAINS community during the Neuro Inspired Computational Elements (NICE) Conference 2026 in Atlanta, USA.

The system connects BrainScaleS-2 chips through field-programmable gate arrays (FPGAs), which route the spikes exchanged between the neuromorphic chips. The first configuration consists of two interconnected backplanes, each supporting 12 BrainScaleS-2 chips. Together, the system can provide around 12,000 neurons and 3 million synaptic circuits in a single rack.

Low-latency communication is particularly important for BrainScaleS-2. The system runs neural dynamics around 1,000 times faster than biological real time, so delays in communication between chips can quickly become significant. Tests of the new system showed chip-to-chip latencies of around one microsecond, even when spikes travelled across several FPGAs.

The modular design also allows the system to grow further. By connecting additional units, the researchers envisage systems with at least 120 BrainScaleS-2 chips, providing more than 61,000 neurons and 15 million synaptic connections. This could open the way to studying larger spiking neural networks and new approaches to training and configuring neuromorphic hardware.

The FPGA-based approach is also intended as a flexible step towards future systems in which neuromorphic chips could be connected more directly. The experience gained with the multi-chip system can help researchers develop and test these future architectures.

The BrainScaleS-2 single-chip system is available to researchers through EBRAINS for experiments in computational neuroscience and neuromorphic machine learning.

The next BrainScaleS hands-on tutorials will be offered on 7 October 2026 at the EBRAINS Users Days in Heidelberg, Germany, and at the virtual training days online on 13 October 2026.

Read the full paper:

J. Ilmberger and J. Schemmel, "The BrainScaleS-2 Multi-Chip System: Interconnecting Continuous-Time Neuromorphic Compute Substrates," 2026 Neuro Inspired Computational Elements (NICE), Atlanta, GA, USA, 2026, pp. 1-6, doi: 10.1109/NICE69539.2026.11567511.